1. Field of the Invention
The present invention relates to a bump-equipped electronic component and a method for manufacturing a bump-equipped electronic component.
2. Description of the Related Art
There are known bump-equipped electronic components, for example, a bump-equipped semiconductor substrate which has a plurality of bumps having different cross-sectional areas in a direction parallel to the principal surface of the semiconductor substrate (refer to Japanese Unexamined Patent Application Publication No. 2001-223321).
In the case where bumps having different cross-sectional areas, in a direction parallel to the principal surface of a semiconductor substrate, are formed of plating films, since the plating film growth rate differs between the bumps having different cross-sectional areas, the resulting bumps have different heights from the principal surface of the substrate. Specifically, the plating film growth rate increases as the cross-sectional area (diameter) of the bump increases. Therefore, the bump height from the principal surface of the substrate increases with increasing cross-sectional area of the bump.
When such a semiconductor substrate provided with bumps having different heights is mounted on a mounting substrate, the semiconductor substrate becomes inclined relative to the mounting substrate. Consequently, an unwanted capacitance is generated between the circuit on the semiconductor substrate and the mounting substrate, resulting in changes in the characteristics of the semiconductor chip.
Furthermore, in the case where the semiconductor substrate is mounted in an inclined manner, stress is concentrated in the connecting portion of the semiconductor substrate at the bump having a small cross-sectional area, i.e., the connecting portion of the semiconductor substrate at the bump having a small height from the principal surface, resulting in failure of a connection between the semiconductor substrate and the mounting substrate.